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sandeepbangalore

sandeepbangalore

Member

sandeepbangalore is a member of CrazyEngineers since Mar 1, 2012

Member since

Mar 1, 2012

Last active

May 4, 2012

Posts contributed

15

Recent posts

Apr 4, 2012
Any body please answer me do you know why microblaze (soft core) is recommended most in the processor design ? why not to use Power pc hard core ?
Mar 18, 2012
fine thanks.. 😁
Mar 16, 2012
aarthivg@andeepbangalore the output is Q* in this figure i found that , when j = k =1 then the output is toggle i mean will be compliment for previous output...
Mar 16, 2012
aarthivg@andeepbangalore the output is Q*Q* is nothing but the same rite i mean , out put is compliment of the previous output ?
Mar 15, 2012
aarthivgI hope this might help youi got it. but some confusion in design i mean in gates, its NOR or NAND like that ? one more is these design is...
Mar 15, 2012
aarthivgThe uncertainty in the state of and SR flip flop When S=R=1 can be eliminated by converting it into a JK flip flop.thanks.how to convert it sr to jk ?...
Mar 15, 2012
any one can explain the differences between SR and JK flipflops (not a latch) ????? 😕
Mar 15, 2012
thanks every one 😁 😀​
Mar 13, 2012
@#-Link-Snipped-# Raunak1302What do we exactly mean by getting latched??
Mar 13, 2012
The example shows D-latch and D-FF. The simplest form of data storage is latch. It's output responds immidiately to changes at the input and the input state will be remembered,...
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