Jeffrey SamuelIn Test bench mate Main module you will have only input and output ports Test bench has inout ports as well Thanks for your reply Jeffrey. I tried.. but...

Thanks for your reply Jeffrey. I tried.. but m not able to load text file values as an input to the inout port. I used $readmemh(" txt filename.txt", inout port...

hi can anyone please tell how to assign the pixel values stored in text file to an inout port in verilog code? Is it in test bench or the main...

can any one please tell me how to write verilog code for gaussian filter. Thanks in advance.

sir .i want to implement edge detection using canny algorithm in verilog . i am very much interested to do this project . sir please send me this code. I...