Delay in Verilog Programme

this verilog coding is for a sorter that moves in two directions after detection of bar code (black or white) from the bin. However after the detection, by the time bin reaches the sorting arm through conveyor, its already in its initial position. So what i need is a delay of 5seconds after the detection. HOw to adjust that in the coding?

module trial(clk, a, b, RCServo_pulse);
input clk;
input a, b;
output RCServo_pulse;
reg [7:0] RxD_data_reg;
always @(posedge clk)
if ((~a) & (~b)) begin
RxD_data_reg <= 8'b00000000;
if (((~a) & b) | (a & (~b))) begin
RxD_data_reg <= 8'b11111100;
if (a & b)
#10000 begin
RxD_data_reg <= 8'b10000000;

parameter ClkDiv = 195; // 50000000/1000/256 = 195.31

reg [7:0] ClkCount;
reg ClkTick;
always @(posedge clk) ClkTick <= (ClkCount==ClkDiv);
always @(posedge clk) if(ClkTick) ClkCount <= 0; else ClkCount <= ClkCount + 1; /* reset ClkCount when 1 tick
else continue counting*/
reg [11:0] PulseCount;
always @(posedge clk) if(ClkTick) PulseCount <= PulseCount + 1; // for each tick increment pulsecount 1

// make sure the RCServo_position is stable while the pulse is generated
reg [7:0] RCServo_position;
always @(posedge clk) if(PulseCount==0) RCServo_position <= RxD_data_reg; /*first time through Pulsecount output width of pulse
thereafter output 0 until time for next pulse*/
reg RCServo_pulse;
always @(posedge clk)
RCServo_pulse <= (PulseCount < {4'b0001, RCServo_position});


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