NAND NOR implementations

Replies

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  [Prototype]

  I dont know how relevant my answer is to your question, but if we take the perspective of CMOS circuits, inverting gates are preferable as they can be built with less number of cmos structure as opposed to the non inverting gates like AND and NOT stage seperately. This not only reduces the number of gates required but also increases the speed as several delays are skipped.
  
  Not to forget, the lesser is the number of gates, the easier it will be to integrate them.
  
  Getting more inside, nand is the most preferred gate as its faster than nor and easier in construction.
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  Jeffrey Arulraj

  So the CMOS arrays in general are constructed mostly in NAND than in any other gates
  
  Thanks friend that external b***h slapped me with it I hardly knew any thing about it
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  [Prototype]

  jeffrey samuel

  So the CMOS arrays in general are constructed mostly in NAND than in any other gates
  
  Thanks friend that external b***h slapped me with it I hardly knew any thing about it

  Yes, practical circuits will mostly use nand gates. I am quite shocked that external asked you such question when you are still in 2nd year. Perhaps you seem to have given question to his all answers and he might have been looking to let you down atleast once. Else you are from IIT/NIT...😁
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  Jeffrey Arulraj

  Not that I had a simple experiment to do implement a Full Adder and Subtractor using NAND I got the op verified and the three questions She asked in the Viva where like hell one was this So got it clarified
  
  That devil was a PhD holder it seems
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  [Prototype]

  jeffrey samuel

  Not that I had a simple experiment to do implement a Full Adder and Subtractor using NAND I got the op verified and the three questions She asked in the Viva where like hell one was this So got it clarified
  
  That devil was a PhD holder it seems

  Well, just hard luck. Happens to everyone...😀
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  Jeffrey Arulraj

  Yeah man thanks for the info most rewarding
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  prashanth463

  i still didn't understand, can someone please explain it to me
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  Jeffrey Arulraj

  NAND and NOR arrays are inbuilt part of VLSI concepts no further idea though
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  prashanth463

  we have VLSI in our next semester, looks like i have to wait for my answers 😀
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  Gowtham_JGR

  In VLSI technology we need to construct the circuit which is simple, reliable, less complex and very fast. While making Gates using CMOS, NAND gates are easy to make ! if you want to make it using an AND gate and OR gate a NOT gate must be implemented after constructing NAND gate and NOR gate, so if you apply AND and OR gate the circuit complication in CMOS increases. see attached images if you have doubt
  
  Hope it will solve your doubts
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  Gowtham_JGR

  Not only in VLSI in every field there is necessary to follow simple and efficient design method to get high efficiency
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  Sagar07

  well well well, i think at 2nd year level, the answer expected by external was, NAND and NOR are universal gates. You can construct any boolean expression using either of these gates. For example if you want to implement, ex-or function, you need, 3 ics, not gate, or gate, and gate. If we simply use NAND/NOR implementation, we require only 1 type of IC. So, we dont have to check the availability of all the ICs.
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  Jeffrey Arulraj

  Hello I am not so foolish to not answer it She gave a blank stare for it and pointed that it could be said even by a 12 th grader
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  Nishant Patel

  All nand and nor are universal gates.
  We can make any logic(and,or,not,xor etc.)using only these two.
  today in any digital circuitt, any and,or,not,xor,x nor hardly exists without nand,nor gates;using CMOS technology.