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@nishant-patel-aJRVpl • Dec 11, 2012
@abcd-2NEyMb • Dec 12, 2012
@prototype-G9Gn5k • Dec 12, 2012
@nishant-patel-aJRVpl • Dec 12, 2012
@abcd-2NEyMb • Dec 13, 2012
I'm wont conform with the faster transition delay. I dont think it will change. Any sources for it.[Prototype]There are actually various reasons and one could argue.
Active high inputs are those inputs which gets invoked on high (or +5v). When they are not in use, we generally tend to keep them unconnected WHICH IS NOT A 0v CONDITION. Its an high impedance state and external random signals may somehow cause an spike or glitch. This is generally not an problem with data pins but if this happens to be on RESET signal, it'll totally bring failure of the application that was running.
Hence, signals like Reset & crucial control signals are always active low and you keep them tied to VCC when not in use. This ensures that circuit will not face any false triggers like we saw in case of active high signals.
Another reason is, the transition from High to Low is comparatively faster than transition from Low to High. This helps decreasing the propagation delay of the signal & hence increasing the speed.
@prototype-G9Gn5k • Dec 13, 2012
As I said, one could argue on the reasons...mreccentricI'm wont conform with the faster transition delay. I dont think it will change. Any sources for it.
What you talking about in the first part, i think, is nothing but pulling up mode. Also, give me the reference for this. But, you are partly right.
@abcd-2NEyMb • Dec 13, 2012
