How to produce 1hz from 4mhz clock

The problem is to implement the counter in FPGA kit that uses 4 mhz. But the requirement is the counter should increment exactly at 1 second that is the counter should use 1 hz clock frequency.

Can anyone help me in reducing the 4 Mhz clock signal to 1 Hz clock signal by using less circuit component to implement in FPGA kit.

Replies

  • silverscorpion
    silverscorpion
    Well, you can try to get frequencies like 2 MHz or 1 MHz from a clock of 4 MHz. But getting it down to 1 Hz is way too difficult.

    Instead of trying to do so, you can try to generate a separate clock of 1 Hz with an external circuit and use it with your fpga kit. That would be the best way, I can say..

    Use a simple oscillator like using 555 to generate a 1 Hz clock..
  • debu
    debu
    @elavarasan: Its very simple. In Verilog you would:

    module oneHertzFromFour (input clk4M, output reg clk1Hz)
        reg [22:0]cnt;
        always @(posedge(clk4M)
        begin
            cnt=cnt+1;
            if(cnt==2000000)
                clk1Hz=~clk1Hz;
        end
    end module
    Hope that helps.

    Regards,

    Debu ๐Ÿ˜€
  • elavarasan
    elavarasan
    Thanks Debu but can you give some ideas in gate level modelling
  • debu
    debu
    @elavarasan: If you synthesize the above verilog code, you will get the gate level diagram. It will be a little different for each FPGA and synthesis tool.

    Regards,

    Debu ๐Ÿ˜€
  • elavarasan
    elavarasan
    Thank you Mr.Devesh.๐Ÿ˜€

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