CMOS invertor

Hi,
I know the basic working of a CMOS invertor. what I don't understand is how it works in the forbidden region. I'll ask my doubt with help of an example.

(W/L)p=5*(W/L)n
Un=3Up(pronounce U=myu)
Vthn=0.7v=|Vthp|
Vdd=5v
Suppose at present my invertor output is 0v. I give a input voltage of 2.7v. What will be the value to which my output will settle.
Repeat the same question with input=0.8v(the difference it will create is that the pmos will be initially in the linear region now.)

From what I understand, in any of the case , pmos will try to charge the capacitor to 5v while the nmos will try to discharge it to 0v. So, I believe that the output will be 0v if the resistance of nmos is less than that of pmos and the output will remain at 5v otherwise.
But, the resistance of a mosfet is not constant but varies with the current.
Also, voltage characterstics of a invertor shows that of intermediate values such as 2.7v, the output is not 0v or 5v , but actually lies somewhere in between.
So, basically I am confused. Can anybody help?

Thanx in advance!!

Replies

  • RRITESH
    RRITESH
    Post your schematics, for better understanding.

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