1. Home >
  2. Apps >
  3. Groups >

Architectural utility of cache in optimising power consumption of mutiprocessor chip

Question asked by radha gogia in #Electronics on Oct 28, 2014
radha gogia
radha gogia · Oct 28, 2014
Rank C3 - EXPERT
Please give the major points (just highlight the points) describing the fact that the cache memory design reduces power consumption in multiprocessor chip systems. Posted in: #Electronics

You must log-in or sign-up to reply to this post.

Click to Log-In or Sign-Up